Field of the Disclosure
The present disclosure relates generally to integrated circuits and, more particularly, to integrated circuits employing a die stack.
Description of the Related Art
Traditionally, integrated circuit (IC) performance has been improved by scaling the number of components integrated into a single semiconductor die. However, because of power density constraints, limitations on interconnect scaling, and other physical limitations, it is increasingly difficult to further improve performance by scaling an individual die. Accordingly, integrated circuit designers have turned to “three-dimensional” integrated circuit arrangements, wherein multiple dies are stacked on top of each other. These stacked die designs provide many benefits, including small footprints, improved yields, and better performance. However, each die in the stack must be configured to work with each other die, increasing manufacturing, warehousing, and other production costs.